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Optimization

24 minute read

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Introduction

Vector Processing

8 minute read

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Hardware compute platforms have been evolving at an expeditious rate, resulting from drastic improvements in CPU frequencies, memory bandwidth, and capacity enhancements across the memory hierarchy, the development of feature-rich ISAs (Instruction Set Architecture) with native hardware support for increasingly complex operations, shrinking of the transistors and microprocessors, availability of multiple cores and CPUs and so on. The availability of these highly capable compute-intensive platforms, coupled with their ever-expanding range of supported features and available resources as part of affordable COTS (Commercial-Off-The-Shelf) Servers, has opened up a treasure trove of possible use cases and limitless applications that were previously both unheard-of and unexplored.

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Teaching experience 1

Undergraduate course, University 1, Department, 2014

This is a description of a teaching experience. You can use markdown like any other post.

Teaching experience 2

Workshop, University 1, Department, 2015

This is a description of a teaching experience. You can use markdown like any other post.